ARM Z6.1+dmb.st+dmb.st+dsb.st
"DMB.STdWW Wse DMB.STdWW Rfe DSB.STdRW Wse"
Cycle=Rfe DSB.STdRW Wse DMB.STdWW Wse DMB.STdWW
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Ws Rf Ws
Orig=DMB.STdWW Wse DMB.STdWW Rfe DSB.STdRW Wse
{
%x0=x; %y0=y;
%y1=y; %z1=z;
%z2=z; %x2=x;
}
P0 | P1 | P2 ;
MOV R0,#2 | MOV R0,#2 | LDR R0,[%z2] ;
STR R0,[%x0] | STR R0,[%y1] | DSB ST ;
DMB ST | DMB ST | MOV R1,#1 ;
MOV R1,#1 | MOV R1,#1 | STR R1,[%x2] ;
STR R1,[%y0] | STR R1,[%z1] | ;
Observed
2:R0=1; x=2; y=2;