ARM MP+dmb+addr-rfi-fri-rfi-addr "DMBdWW Rfe DpAddrdW Rfi Fri Rfi DpAddrdR Fre" Cycle=Rfi Fri Rfi DpAddrdR Fre DMBdWW Rfe DpAddrdW Prefetch=0:x=F,0:y=W,1:y=F,1:x=T Com=Rf Fr Orig=DMBdWW Rfe DpAddrdW Rfi Fri Rfi DpAddrdR Fre { %x0=x; %y0=y; %y1=y; %z1=z; %x1=x; } P0 | P1 ; MOV R0,#1 | LDR R0,[%y1] ; STR R0,[%x0] | EOR R1,R0,R0 ; DMB | MOV R2,#1 ; MOV R1,#1 | STR R2,[R1,%z1] ; STR R1,[%y0] | LDR R3,[%z1] ; | MOV R4,#2 ; | STR R4,[%z1] ; | LDR R5,[%z1] ; | EOR R6,R5,R5 ; | LDR R7,[R6,%x1] ; Observed 1:R0=1; 1:R3=1; 1:R5=2; 1:R7=0; z=2;