Test IRRWIW+dmb.st+addr

ARM IRRWIW+dmb.st+addr
"Rfe DMB.STdRR Fre Rfe DpAddrdW Wse"
Cycle=Rfe DMB.STdRR Fre Rfe DpAddrdW Wse
Prefetch=0:x=F,1:x=F,1:y=T,2:y=T,3:y=F,3:x=W
Com=Rf Fr Rf Ws
Orig=Rfe DMB.STdRR Fre Rfe DpAddrdW Wse
{
%x0=x;
%x1=x; %y1=y;
%y2=y;
%y3=y; %x3=x;
}
 P0           | P1           | P2           | P3              ;
 MOV R0,#2    | LDR R0,[%x1] | MOV R0,#1    | LDR R0,[%y3]    ;
 STR R0,[%x0] | DMB ST       | STR R0,[%y2] | EOR R1,R0,R0    ;
              | LDR R1,[%y1] |              | MOV R2,#1       ;
              |              |              | STR R2,[R1,%x3] ;
Observed
    1:R0=1; 1:R1=0; 3:R0=1; x=1;
and 1:R0=1; 1:R1=0; 3:R0=1; x=2;
and 1:R0=2; 1:R1=0; 3:R0=1; x=2;