Test S+dmb+data-wsi-rfi-addr-pos-fri

Executions for behaviour: "1:R0=0 ; 1:R3=2 ; 1:R5=2 ; 1:R6=0 ; x=1 ; z=2"

Executions for behaviour: "1:R0=1 ; 1:R3=2 ; 1:R5=2 ; 1:R6=0 ; x=1 ; z=2"

Executions for behaviour: "1:R0=1 ; 1:R3=2 ; 1:R5=0 ; 1:R6=0 ; x=2 ; z=2"

ARM S+dmb+data-wsi-rfi-addr-pos-fri
"DMBdWW Rfe DpDatadW Wsi Rfi DpAddrdR PosRR Fri Wse"
Cycle=Rfi DpAddrdR PosRR Fri Wse DMBdWW Rfe DpDatadW Wsi
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Ws
Orig=DMBdWW Rfe DpDatadW Wsi Rfi DpAddrdR PosRR Fri Wse
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0           | P1              ;
 MOV R0,#2    | LDR R0,[%y1]    ;
 STR R0,[%x0] | EOR R1,R0,R0    ;
 DMB          | ADD R1,R1,#1    ;
 MOV R1,#1    | STR R1,[%z1]    ;
 STR R1,[%y0] | MOV R2,#2       ;
              | STR R2,[%z1]    ;
              | LDR R3,[%z1]    ;
              | EOR R4,R3,R3    ;
              | LDR R5,[R4,%x1] ;
              | LDR R6,[%x1]    ;
              | MOV R7,#1       ;
              | STR R7,[%x1]    ;
Observed
    1:R0=0; 1:R3=2; 1:R5=2; 1:R6=0; x=1; z=2;
and 1:R0=1; 1:R3=2; 1:R5=2; 1:R6=0; x=1; z=2;
and 1:R0=1; 1:R3=2; 1:R5=0; 1:R6=0; x=2; z=2;