Test MP+PPO582

Executions for behaviour: "1:R0=1 ; 1:R7=1 ; x=2"

…

ARM MP+PPO582
"Fre DMBdWW Rfe PosRR DpCtrldW PosWR PosRR DpAddrdW PosWR"
Cycle=Rfe PosRR DpCtrldW PosWR PosRR DpAddrdW PosWR Fre DMBdWW
Relax=
Safe=Rfe Fre PosWR PosRR DMBdWW DpAddrdW DpCtrldW
Prefetch=1:x=T
Orig=Fre DMBdWW Rfe PosRR DpCtrldW PosWR PosRR DpAddrdW PosWR
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0            | P1               ;
 MOV R0, #2    | LDR R0, [%y1]    ;
 STR R0, [%x0] | LDR R1, [%y1]    ;
 DMB           | CMP R1, R1       ;
 MOV R1, #1    | BNE LC00         ;
 STR R1, [%y0] | LC00:            ;
               | MOV R2, #1       ;
               | STR R2, [%z1]    ;
               | LDR R3, [%z1]    ;
               | LDR R4, [%z1]    ;
               | EOR R5,R4,R4     ;
               | MOV R6, #1       ;
               | STR R6, [R5,%x1] ;
               | LDR R7, [%x1]    ;
Observed
    1:R0=1; 1:R7=1; x=2;