Test MP+PPO564

Executions for behaviour: "1:R0=1 ; 1:R6=1 ; x=2 ; y=2"

…

ARM MP+PPO564
"Fre DMBdWW Rfe PosRR PosRW PosWR DpAddrdW PosWR"
Cycle=Rfe PosRR PosRW PosWR DpAddrdW PosWR Fre DMBdWW
Relax=
Safe=Rfe Fre PosWR PosRW PosRR DMBdWW DpAddrdW
Prefetch=1:x=T
Orig=Fre DMBdWW Rfe PosRR PosRW PosWR DpAddrdW PosWR
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0            | P1               ;
 MOV R0, #2    | LDR R0, [%y1]    ;
 STR R0, [%x0] | LDR R1, [%y1]    ;
 DMB           | MOV R2, #2       ;
 MOV R1, #1    | STR R2, [%y1]    ;
 STR R1, [%y0] | LDR R3, [%y1]    ;
               | EOR R4,R3,R3     ;
               | MOV R5, #1       ;
               | STR R5, [R4,%x1] ;
               | LDR R6, [%x1]    ;
Observed
    1:R0=1; 1:R6=1; x=2; y=2;