Test MP+PPO489

Executions for behaviour: "1:R0=1 ; 1:R4=0 ; y=2"

…

ARM MP+PPO489
"Fre DMBdWW Rfe PosRW PosWR PosRR DpCtrlIsbdR"
Cycle=Rfe PosRW PosWR PosRR DpCtrlIsbdR Fre DMBdWW
Relax=
Safe=Rfe Fre PosWR PosRW PosRR DMBdWW DpCtrlIsbdR
Prefetch=1:x=T
Orig=Fre DMBdWW Rfe PosRW PosWR PosRR DpCtrlIsbdR
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0            | P1            ;
 MOV R0, #1    | LDR R0, [%y1] ;
 STR R0, [%x0] | MOV R1, #2    ;
 DMB           | STR R1, [%y1] ;
 MOV R1, #1    | LDR R2, [%y1] ;
 STR R1, [%y0] | LDR R3, [%y1] ;
               | CMP R3, R3    ;
               | BNE LC00      ;
               | LC00:         ;
               | ISB           ;
               | LDR R4, [%x1] ;
Observed
    1:R0=1; 1:R4=0; y=2;