Test LB+data+detr-fri-rfi-addr

Executions for behaviour: "0:R0=0 ; 1:R0=2 ; 1:R1=0 ; 1:R3=1 ; y=1"

Executions for behaviour: "0:R0=0 ; 1:R0=2 ; 1:R1=0 ; 1:R3=3 ; y=1"

Executions for behaviour: "0:R0=1 ; 1:R0=2 ; 1:R1=0 ; 1:R3=3 ; y=1"

Executions for behaviour: "0:R0=0 ; 1:R0=1 ; 1:R1=0 ; 1:R3=2 ; y=2"

Executions for behaviour: "0:R0=0 ; 1:R0=1 ; 1:R1=0 ; 1:R3=3 ; y=2"

Executions for behaviour: "0:R0=1 ; 1:R0=1 ; 1:R1=1 ; 1:R3=3 ; y=2"

Executions for behaviour: "0:R0=0 ; 1:R0=1 ; 1:R1=0 ; 1:R3=3 ; y=3"

Executions for behaviour: "0:R0=0 ; 1:R0=2 ; 1:R1=0 ; 1:R3=3 ; y=3"

Executions for behaviour: "0:R0=1 ; 1:R0=2 ; 1:R1=0 ; 1:R3=3 ; y=3"

Executions for behaviour: "0:R0=1 ; 1:R0=1 ; 1:R1=1 ; 1:R3=3 ; y=3"

ARM LB+data+detr-fri-rfi-addr
"DpDatadW Rfe DetourR Fri Rfi DpAddrdW Rfe"
Cycle=Rfi DpAddrdW Rfe DpDatadW Rfe DetourR Fri
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Rf
Orig=DpDatadW Rfe DetourR Fri Rfi DpAddrdW Rfe
{
%x0=x; %y0=y;
%y1=y; %x1=x;
%y2=y;
}
 P0           | P1              | P2           ;
 LDR R0,[%x0] | LDR R0,[%y1]    | MOV R0,#2    ;
 EOR R1,R0,R0 | LDR R1,[%y1]    | STR R0,[%y2] ;
 ADD R1,R1,#1 | MOV R2,#3       |              ;
 STR R1,[%y0] | STR R2,[%y1]    |              ;
              | LDR R3,[%y1]    |              ;
              | EOR R4,R3,R3    |              ;
              | MOV R5,#1       |              ;
              | STR R5,[R4,%x1] |              ;
Observed
    0:R0=0; 1:R0=2; 1:R1=0; 1:R3=1; y=1;
and 0:R0=0; 1:R0=2; 1:R1=0; 1:R3=3; y=1;
and 0:R0=1; 1:R0=2; 1:R1=0; 1:R3=3; y=1;
and 0:R0=0; 1:R0=1; 1:R1=0; 1:R3=2; y=2;
and 0:R0=0; 1:R0=1; 1:R1=0; 1:R3=3; y=2;
and 0:R0=1; 1:R0=1; 1:R1=1; 1:R3=3; y=2;
and 0:R0=0; 1:R0=1; 1:R1=0; 1:R3=3; y=3;
and 0:R0=0; 1:R0=2; 1:R1=0; 1:R3=3; y=3;
and 0:R0=1; 1:R0=2; 1:R1=0; 1:R3=3; y=3;
and 0:R0=1; 1:R0=1; 1:R1=1; 1:R3=3; y=3;