Test CO-LB+fri+pos-fri

Executions for behaviour: "0:R0=0 ; 1:R0=1 ; 1:R1=0 ; x=2"

ARM CO-LB+fri+pos-fri
"Fri Rfe PosRR Fri Rfe"
Cycle=Rfe Fri Rfe PosRR Fri
Prefetch=0:x=F,0:x=W,1:x=F,1:x=W
Com=Rf Rf
Orig=Fri Rfe PosRR Fri Rfe
{
%x0=x;
%x1=x;
}
 P0           | P1           ;
 LDR R0,[%x0] | LDR R0,[%x1] ;
 MOV R1,#1    | LDR R1,[%x1] ;
 STR R1,[%x0] | MOV R2,#2    ;
              | STR R2,[%x1] ;
Observed
    0:R0=0; 1:R0=1; 1:R1=0; x=2;