Test Z6.2+dsb+ctrl+data

Executions for behaviour: "1:R0=1 ; 2:R0=1 ; x=2"

ARM Z6.2+dsb+ctrl+data
"DSBdWW Rfe DpCtrldW Rfe DpDatadW Wse"
Cycle=Rfe DpDatadW Wse DSBdWW Rfe DpCtrldW
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Rf Rf Ws
Orig=DSBdWW Rfe DpCtrldW Rfe DpDatadW Wse
{
%x0=x; %y0=y;
%y1=y; %z1=z;
%z2=z; %x2=x;
}
 P0           | P1           | P2           ;
 MOV R0,#2    | LDR R0,[%y1] | LDR R0,[%z2] ;
 STR R0,[%x0] | CMP R0,R0    | EOR R1,R0,R0 ;
 DSB          | BNE LC00     | ADD R1,R1,#1 ;
 MOV R1,#1    | LC00:        | STR R1,[%x2] ;
 STR R1,[%y0] | MOV R1,#1    |              ;
              | STR R1,[%z1] |              ;
Observed
    1:R0=1; 2:R0=1; x=2;