Test MP0093

Executions for behaviour: "1:R0=2 ; 1:R4=1 ; y=2"

ARM MP0093
"DMBdWW Rfe PosRW PodWR DpAddrdR Fre"
Cycle=Rfe PosRW PodWR DpAddrdR Fre DMBdWW
Relax=[Fre,DMBdWW,Rfe]
Safe=PosRW PodWR DpAddrdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMBdWW Rfe PosRW PodWR DpAddrdR Fre
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0           | P1              ;
 MOV R0,#1    | LDR R0,[%y1]    ;
 STR R0,[%x0] | MOV R1,#2       ;
 DMB          | STR R1,[%y1]    ;
 MOV R1,#1    | LDR R2,[%z1]    ;
 STR R1,[%y0] | EOR R3,R2,R2    ;
              | LDR R4,[R3,%x1] ;
Observed
    1:R0=2; 1:R4=1; y=2;