Test MP+dmb+addr-pos-fri-rfi-addr

Executions for behaviour: "1:R0=1 ; 1:R2=1 ; 1:R3=1 ; 1:R5=1 ; 1:R7=1"

ARM MP+dmb+addr-pos-fri-rfi-addr
"DMBdWW Rfe DpAddrdR PosRR Fri Rfi DpAddrdR Fre"
Cycle=Rfi DpAddrdR Fre DMBdWW Rfe DpAddrdR PosRR Fri
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMBdWW Rfe DpAddrdR PosRR Fri Rfi DpAddrdR Fre
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0           | P1              ;
 MOV R0,#1    | LDR R0,[%y1]    ;
 STR R0,[%x0] | EOR R1,R0,R0    ;
 DMB          | LDR R2,[R1,%z1] ;
 MOV R1,#1    | LDR R3,[%z1]    ;
 STR R1,[%y0] | MOV R4,#1       ;
              | STR R4,[%z1]    ;
              | LDR R5,[%z1]    ;
              | EOR R6,R5,R5    ;
              | LDR R7,[R6,%x1] ;
Observed
    1:R0=1; 1:R2=1; 1:R3=1; 1:R5=1; 1:R7=1;