"ARM relaxing ppo to accomodate qualcomm behaviors"
(* Uniproc *)
let poi = po-loc
let complus = fr|rf|co|(co;rf)|(fr;rf)
irreflexive poi;complus as uniproc

(* Utilities *)
let dd = addr | data
let rdw = po-loc & (fre;rfe)
let detour = po-loc & (coe ; rfe)
let addrpo = addr;po
(*******)
(* ppo *)
(*******)


(* Initial value *)
let ci0 = ctrlisync | detour
let ii0 = dd | rfi | rdw
let cc0 = dd | ctrl | addrpo |
  ( po-loc \ ( rfi | (po-loc;rfi)))   (* po-loc replaced *)
let ic0 = 0

(* Fixpoint from i -> c in instructions and transitivity *)
let rec ci = ci0 | (ci;ii) | (cc;ci)
and ii = ii0 | ci | (ic;ci) | (ii;ii)
and cc = cc0 | ci | (ci;ic) | (cc;cc)
and ic = ic0 | ii | cc | (ic;cc) | (ii ; ic) (* | ci inclus dans ii et cc *)

let ppo = RW(ic) | RR(ii)


(**********)
(* fences *)
(**********)

(* Power *)
let lwsync = RM(lwsync)|WW(lwsync)
let eieio = WW(eieio)
show sync lwsync eieio

(* ARM *)
let dmb.st=WW(dmb.st)
let dsb.st=WW(dsb.st)
show dmb dsb dmb.st dsb.st

(* Common, all arm barriers are strong *)
let strong = sync|dmb|dsb|dmb.st|dsb.st
let light = lwsync|eieio

let fence = strong|light


(* extensions *)
let ppoext = (rfe;ppo)|(ppo;rfe)|(rfe;ppo;rfe)
let fenceext = (rfe;fence)|(fence;rfe)|(rfe;fence;rfe)

(* happens before *)
let hb = ppo | ppoext | fence | fenceext
let GHB = hb
acyclic hb as thinair

(* prop *)
let hbstar = hb*
let propbase = (fence|fenceext);hbstar

let chapo = rfe|fre|coe|(fre;rfe)|(coe;rfe)

let prop = WW(propbase)| (chapo? ; propbase*; strong; hbstar)

acyclic co|prop as propagation
irreflexive fre;prop;hbstar as causality