Test MP+PPO404

ARM MP+PPO404
"Fre DMBdWW Rfe PosRW PosWR DpCtrlIsbdR"
Cycle=Rfe PosRW PosWR DpCtrlIsbdR Fre DMBdWW
Relax=
Safe=Rfe Fre PosWR PosRW DMBdWW DpCtrlIsbdR
Prefetch=1:x=T
Orig=Fre DMBdWW Rfe PosRW PosWR DpCtrlIsbdR
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0            | P1            ;
 MOV R0, #1    | LDR R0, [%y1] ;
 STR R0, [%x0] | MOV R1, #2    ;
 DMB           | STR R1, [%y1] ;
 MOV R1, #1    | LDR R2, [%y1] ;
 STR R1, [%y0] | CMP R2, R2    ;
               | BNE LC00      ;
               | LC00:         ;
               | ISB           ;
               | LDR R3, [%x1] ;
Observed
    1:R0=1; 1:R3=0; y=2;