Address and data dependencies |
This note illustrates that address and data dependencies may behave differently. It is reminded that an address dependency occurs when the effective address of a store depends upon the value read by a previous load instruction; while a data dependency occurs when the the value stored by a store instruction depends upon the value. The difference is observable on ARM hardware only, as the tests derive from the LB and S+ffence+po idioms, which are not observed on Power.
Model | ARM | Relax-Addr-PoR | Tegra2 | APQ8060 | A5X | A6X | Exynos5250 | Tegra3 | Exynos4412 | Exynos5410 | APQ8064 | |
S+dmb+po | Allow | Ok, 22M/50G | Allow | Ok, 306k/5.2G | Ok, 4.5k/3.6G | Ok, 3.1M/5.5G | No, 0/13G | No, 0/8.3G | Ok, 343k/1.2G | Ok, 18M/7.0G | No, 0/6.3G | Ok, 1/400M |
Allow unseen | Allow unseen | Allow unseen | ||||||||||
DataRW | Allow | Ok, 65k/77G | Allow | Ok, 5.9k/23G | No, 0/9.2G | Ok, 13k/5.0G | No, 0/12G | No, 0/8.3G | Ok, 15k/4.3G | Ok, 31k/7.0G | No, 0/6.3G | Ok, 361/2.4G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | |||||||||
AddrRW | Forbid | Ok, 0/122G | Forbid | Ok, 0/36G | Ok, 0/9.1G | Ok, 0/8.2G | Ok, 0/12G | Ok, 0/8.3G | Ok, 0/14G | Ok, 0/22G | Ok, 0/6.3G | Ok, 0/4.5G |
DataWW | Allow | Ok, 224k/77G | Allow | Ok, 6.6k/22G | No, 0/9.2G | Ok, 30k/4.9G | No, 0/12G | No, 0/8.3G | Ok, 200/4.2G | Ok, 185k/7.0G | No, 0/6.3G | Ok, 2.5k/2.4G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | |||||||||
AddrWW | Forbid | Ok, 0/111G | Forbid | Ok, 0/25G | Ok, 0/9.2G | Ok, 0/8.2G | Ok, 0/12G | Ok, 0/8.3G | Ok, 0/14G | Ok, 0/22G | Ok, 0/6.3G | Ok, 0/4.5G |
LB | Allow | Ok, 154M/51G | Allow | Ok, 1.6M/5.1G | Ok, 4.9k/3.3G | Ok, 45M/6.3G | No, 0/14G | No, 0/8.3G | Ok, 19M/1.2G | Ok, 89M/7.0G | No, 0/6.3G | Ok, 154/400M |
Allow unseen | Allow unseen | Allow unseen | ||||||||||
LB+datas+WW | Allow | Ok, 506k/90G | Allow | Ok, 46k/23G | No, 0/25G | Ok, 182k/5.6G | No, 0/13G | No, 0/8.3G | Ok, 526/1.8G | Ok, 277k/7.0G | No, 0/6.3G | Ok, 2/400M |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | |||||||||
LB+addrs+RW | Forbid | Ok, 0/146G | Forbid | Ok, 0/31G | Ok, 0/23G | Ok, 0/6.9G | Ok, 0/13G | Ok, 0/8.3G | Ok, 0/30G | Ok, 0/22G | Ok, 0/6.3G | Ok, 0/4.5G |
LB+addrs+WW | Forbid | Ok, 0/152G | Forbid | Ok, 0/33G | Ok, 0/25G | Ok, 0/9.0G | Ok, 0/13G | Ok, 0/8.3G | Ok, 0/30G | Ok, 0/22G | Ok, 0/6.3G | Ok, 0/4.5G |
The above table lists some tests that differ only in some dependencies from one load to one store: the dependency being either an address dependency or a data dependency. Names should help to identify the matching tests. For instance LB+addrs+WW matches LB+datas+WW.
Then, one sees that tests with a data dependency are allowed by the model and observed on hardware; while tests with an address dependency are forbidden by the model and not observed on hardware.
Model | Power | PowerG5 | Power6 | Power7 | |
S+sync+po | Allow | No, 0/108G | No, 0/8.0G | No, 0/18G | No, 0/81G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | ||
DataRW | Allow | No, 0/287G | No, 0/35G | No, 0/650M | No, 0/252G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | ||
AddrRW | Forbid | Ok, 0/287G | Ok, 0/35G | Ok, 0/650M | Ok, 0/252G |
DataWW | Allow | No, 0/287G | No, 0/35G | No, 0/650M | No, 0/252G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | ||
AddrWW | Forbid | Ok, 0/287G | Ok, 0/35G | Ok, 0/650M | Ok, 0/252G |
LB | Allow | No, 0/362G | No, 0/13G | No, 0/44G | No, 0/305G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | ||
LB+datas+WW | Allow | No, 0/296G | No, 0/35G | No, 0/9.2G | No, 0/252G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | ||
LB+addrs+RW | Forbid | Ok, 0/186G | Ok, 0/9.2G | Ok, 0/6.0G | Ok, 0/171G |
LB+addrs+WW | Forbid | Ok, 0/295G | Ok, 0/35G | Ok, 0/8.7G | Ok, 0/252G |
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