Test S+PPO780

Executions for behaviour: "1:R0=1 ; x=2"

ARM S+PPO780
"Wse DMBdWW Rfe PosRR DpCtrldW"
Cycle=Rfe PosRR DpCtrldW Wse DMBdWW
Relax=
Safe=Rfe Wse PosRR DMBdWW DpCtrldW
Prefetch=0:x=F,1:x=W
Orig=Wse DMBdWW Rfe PosRR DpCtrldW
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0            | P1            ;
 MOV R0, #2    | LDR R0, [%y1] ;
 STR R0, [%x0] | LDR R1, [%y1] ;
 DMB           | CMP R1, R1    ;
 MOV R1, #1    | BNE LC00      ;
 STR R1, [%y0] | LC00:         ;
               | MOV R2, #1    ;
               | STR R2, [%x1] ;
Observed
    1:R0=1; x=2;