Test CoRR

 ModelTegra2APQ8060A5XA6XExynos5250Tegra3Exynos4412Exynos5410APQ8064
CoRRForbid4/20G0/8.6G1.0k/3.7G0/14G0/8.3G5/2.7G163/11G0/6.3G0/7.5G

Executions for behaviour: "1:R0=2 ; 1:R1=1"

ARM CoRR

{0:R2=x; 1:R2=x;}

 P0          | P1          ;
 MOV R0,#1   | LDR R0,[R2] ;
 STR R0,[R2] | LDR R1,[R2] ;
 MOV R1,#2   |             ;
 STR R1,[R2] |             ;
exists (1:R0=2 /\ 1:R1=1)