Model | APQ8060 | A5X | A6X | Exynos5250 | Tegra3 | Exynos4412 | Exynos5410 | APQ8064 | |
LB+data+fri-rfi-addr | Forbid | No, 0/1.4G | No, 0/2.4G | No, 0/2.6G | No, 0/3.4G | No, 0/2.5G | No, 0/4.8G | No, 0/4.1G | Ok, 109k/4.6G |
Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen |
Executions for behaviour:
"0:R0=1 ; 1:R0=1 ; 1:R2=2 ; y=2"
ARM LB+data+fri-rfi-addr "DpDatadW Rfe Fri Rfi DpAddrdW Rfe" Cycle=Rfi DpAddrdW Rfe DpDatadW Rfe Fri Prefetch=0:x=F,0:y=W,1:y=F,1:x=W Com=Rf Rf Orig=DpDatadW Rfe Fri Rfi DpAddrdW Rfe { %x0=x; %y0=y; %y1=y; %x1=x; } P0 | P1 ; LDR R0,[%x0] | LDR R0,[%y1] ; EOR R1,R0,R0 | MOV R1,#2 ; ADD R1,R1,#1 | STR R1,[%y1] ; STR R1,[%y0] | LDR R2,[%y1] ; | EOR R3,R2,R2 ; | MOV R4,#1 ; | STR R4,[R3,%x1] ; Observed 0:R0=1; 1:R0=1; 1:R2=2; y=2;