Executions for behaviour: "0:R0=1 ; 1:R0=1"
Executions for behaviour: "0:R0=2 ; 1:R0=1"
ARM DETOUR0153 "DpDatadW Rfe DpAddrdW Wsi Rfe" Cycle=Rfe DpAddrdW Wsi Rfe DpDatadW Prefetch=0:x=F,0:y=W,1:y=F,1:x=W Com=Rf Rf Orig=DpDatadW Rfe DpAddrdW Wsi Rfe { %x0=x; %y0=y; %y1=y; %x1=x; } P0 | P1 ; LDR R0,[%x0] | LDR R0,[%y1] ; EOR R1,R0,R0 | EOR R1,R0,R0 ; ADD R1,R1,#1 | MOV R2,#1 ; STR R1,[%y0] | STR R2,[R1,%x1] ; | MOV R3,#2 ; | STR R3,[%x1] ; exists 1:R0=1 /\ (0:R0=2 \/ 0:R0=1)